Technology

Architectures

CHERI is an architectural approach implemented in several instruction-set contexts, including research and development work for MIPS, RISC-V, Arm Morello and the embedded CHERIoT profile.

For
Developers, architects and assurance professionals
Last reviewed
2026-08-05
Review cycle
Review every 6 months

Why it matters

Naming the exact architecture prevents software and evidence from being transferred across incompatible targets.

In brief

CHERI is an architectural approach implemented in several instruction-set contexts, including research and development work for MIPS, RISC-V, Arm Morello and the embedded CHERIoT profile. These share capability principles but differ in encoding, privilege model, ABI and platform ecosystem.

Use the architecture name as the start of a compatibility check, not the conclusion. Record the base ISA, CHERI variant and revision, privilege model, capability format, ABI and software release before comparing results or moving code between platforms.

Key considerations

1. Shared model

Capabilities carry protected authority with bounds, permissions and validity that software cannot freely increase.

2. Architecture profile

Each target defines instructions, registers, exception behaviour, capability representation and integration with its base ISA.

3. Software contract

Compilers, ABIs, operating systems and libraries must match the selected architecture and revision.

Evidence and caveats

‘CHERI’ is not a single binary ISA. Always record the architecture, specification version, extensions and ABI.

Use the exact architecture and software specification implemented by the target. Separate architectural guarantees from system-level outcomes.

Primary routes

Where next

Create an architecture manifest for your platform before selecting tools, software or benchmarks.

Find the matching specification