Event archive
CHERITech’25
A concentrated technical programme on CHERI processors, platforms, software, performance, formal work and standardisation.
Conference at a glance
A practical view of the stack in late 2025.
CHERITech’25 brought together researchers, cybersecurity specialists, product developers and systems engineers. The programme is useful for comparing multiple layers at the same point in time: processor architecture, open hardware, embedded platforms, software, performance, standards and new compartment models.
An online “Reloaded” event on 4 December added live Q&A sessions for a selection of talks.
Selected sessions
A route through the programme
Talk titles and affiliations reflect the official 2025 programme.
An open-source RV64Y implementation for commercialisation
Jonathan Woodruff · Capabilities Limited
Announcing COSMIC
John Thomson · lowRISC
CHERI Performance
Carl Shaw · Codasip
Sonata: a platform for high-integrity operational technology
Marno van der Maas · lowRISC
CHERIoT Audit
David Chisnall · SCI Semiconductor
BLACKOUT: data-oblivious computation with blinded capabilities
Thomas Nyman · Ericsson
Progress of CHERI
Robert Watson · CHERI Alliance
CHERI-RISC-V standardisation status
Tariq Kurd · Codasip
Which virtual machines can I run on CHERI?
Jeremy Singer · University of Glasgow
Continue
Use the recording with the matching current platform page.
Platform status may have moved since November 2025. Recheck release, support and standards status before using a talk as current evidence.