Platforms

FPGA platforms

FPGA platforms let teams run CHERI processor and SoC designs on reconfigurable hardware before committing to silicon.

For
Developers, architects, product leaders and procurement teams
Last reviewed
2026-08-05
Review cycle
Review every 6 months

Overview

FPGA platforms let teams run CHERI processor and SoC designs on reconfigurable hardware before committing to silicon. They are valuable for firmware, peripherals, system integration, teaching and reproducible architecture experiments.

Choose an FPGA platform by the question it must answer. Firmware and peripheral work need stable interfaces and examples; architecture experiments need accessible RTL; adoption studies need a maintained tool flow and a credible transition path to processor IP or silicon.

Best fit

An FPGA board provides physical I/O and timing behaviour that a simulator may omit while retaining more flexibility than a fixed chip.

What to evaluate

1. Fit

Check FPGA capacity, memory, peripherals, debug access and the supported CHERI bitstream or RTL.

2. Reproducibility

Pin board revision, tool version, RTL commit, constraints, firmware and software image.

3. Interpretation

Separate FPGA timing, area and clock results from an eventual ASIC implementation.

Check current status

An FPGA prototype is not evidence of final silicon performance, power, area or assurance, and vendor tool licences may affect reproducibility.

Verify availability, maturity, specifications, software support and lifecycle terms with the current platform owner before procurement.

Provider and project sources

Try it

Reproduce a published bitstream and reference application before changing the RTL or peripheral map.

Explore a CHERIoT FPGA platform